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GRADUATE STUDENTS

Former PhD students

• Luke Pierce, Testing and Security Related Considerations in Embedded Software, ECE Dept., SIUC, August 2016. Currently with Intel Corporation, Senior Engineer.
• Phaninder Alladi, Validation of Circuit Timing Behavior in the Presence of Delay Defects and NBTI aging, ECE Dept., SIUC, August 2016. Currently with Synopsys Corporation, Senior Engineer.
• Ahish Mysore Somashekar, Methodologies for Test and Diagnosis of Delay Defects in Integrated Circuits, ECE Dept., SIUC, December 2015. Currently with Intel Corporation, Senior Engineer.
• Pragyan (Sheela) P. Mohanty, Function-based Algorithms for Biological Sequences, ECE Dept., SIUC, December 2015. Currently with Southern Illinois University Carbondale.
• Chandra Babu Dara, Design for High Performance Threshold Logic Gates, ECE Dept., SIUC, December 2015. Currently with Broadcom Corporation, Senior Engineer.
• Ashok Kumar Palaniswamy, Synthesis and Testing of Threshold Logic Circuits, ECE Dept., SIUC, July 2014. Currently with Synopsys Corporation, Senior Engineer.
• Kedar Karmakar, Scalable bus encoding for error-resilient high-speed on-chip communication, ECE Dept., SIUC, June 2013. Currently with Intel Corporation, Senior Engineer.
• Sreenivas Gangadhar, Analytical Methods to Propagate and Diagnose Single Event Transients, ECE Dept., SIUC, August 2012. Currently with Intel Corporation, Senior Engineer.
• D. Jayaraman, Optimization Techniques for Performance and Power Dissipation in Test and Validation, ECE Dept., SIUC, May 2012. Currently with Nvidia Inc., Senior Engineer.
• M.K. Goparaju, Coping with discrepancies of the manufactured weights in Threshold Logic gates, ECE Dept., SIUC, December 2009. Currently with Qualcomm Inc., Senior Engineer.
• M.N. Skoufis, Coping with delays and hazards in buses and random logic in deep sub-micron, ECE Dept., SIUC, August 2009. Currently with Raytheon Inc., Senior Engineer.
• E. Flanigan, Scalable Test Generation for Path Delay Faults, ECE Dept., SIUC, January 2009. Currently a Senior Engineer with Boeing Corporation, formerly with Raytheon.
• A. Abdulrahman, Test Pattern Generation Techniques that target low Test Application Time, ECE Dept., SIUC, May 2008. Currently with Qualcomm Inc., Senior Engineer. Previously with Marvell Inc.
• R. Adapa, Techniques for Improved Diagnosis, ECE Dept., SIUC, May 2008. Currently with Qualcomm, Senior Engineer, previously with Nvidia.
• M.M. Vaseekar Kumar, ATPG and Fault Grading for Delay Faults, ECE Dept., SIUC, December 2006. Currently with Synopsys Inc., Staff R&D Engineer.
• K.J. Stewart, Emerging technologies Involving Networks, ECE Dept., SIUC, August 2006. Currently a tenure-track Assistant Professor with the CS Dept., Depauw Univ., IN
• M.M. Khan, Re-synthesis for Intellectual Property Protection and Performance, ECE Dept., SIUC, August 2006. Currently with Synopsys Inc., Staff R&D Engineer.
• S. Padmanaban, Non-enumerative techniques for delay verification and diagnosis, Engineering Sciences (Computer Engineering specialization) SIUC, August 2003, SIUC. Currently with Intel Corporation, Group Manager. Previously with the ECE Dept., Univ. of Maryland Baltimore County, tenure track faculty.
• M. Michael, Test-based timing verification using functional techniques, Engineering Sciences (Computer Engineering specialization) SIUC, August 2002, SIUC. Currently a tenured Assist. Professor with the ECE Dept., Univ. of Cyprus. Previously tenure track Assist. Professor with the CSE Dept., Univ. of Notre Dame.
• D. Karayiannis, Delay Considerations in Testing and Synthesis of Integrated Circuits, August 1996, SIUC (interdisciplinary). Currently a VP of R&D at Inside Secure, France. Previously, Division Manager with Texas Instruments Inc. Prior to that with Viewlogic Inc. and Synopsys Inc.

Co-advised PhD students

• L. Cheng (main advisor W.-C. Hu), Computer Science Department, SIUC, 2007
• J. Zhewei (main advisor: W.-C. Hu), Computer Science Department, SIUC, 2007
• D. Kagaris (main advisor:  F. Makedon), Computer Science Department, Dartmouth College, 1994

Pending PhD Dissertations (Summer 2016 & Fall 2016)

• J. Lenox, Hardware security and test, ECE Department, SIUC (August 2016). Currently a senior engineer at Rockwell-Collins.
• A. Watkins, Single event upsets in integrated circuits, ECE Department, SIUC (Fall 2016). Intern at Los Alamos National Laboratory.
• W. Al-Jubouri, Current sensing for delay measurements in ICs, ECE Department, SIUC (Fall 2016).

Recent MS theses

• Ajitkumar Yadav, Debugging errors in failed functional sequences, ECE Dept., (SIUC. July 2016 –prending). With AMD (starting August 2016).
• Ehsan Ahmadi, Verifying incremental specifications for digital embedded control systems, ECE Dept., SIUC, (August 2016 – pending). PhD program, ECE Dept. SIUC (starting August 2016).
• Theodore Toulas, Transition fault-driven delay defect diagnosis in the presence of process variations, ECE Dept., SIUC, December 2015. Currently at Synopsys.
• Lilian (Vasiliki) Gkintzou, Preemptive edge-based scheduling for real-time networks on-a-chip, ECE Dept., SIUC, October 2014. Currently at ADVANTEST.

Current PhD students

• P.K. Javvaji (statistical timing analysis and test)
• P. Savanur (hardware security)
• N. Mozaffari (emerging technologies)
• M. Cubley (bio-informatics)

New PhD students

• Krishna Prasad Gnawali
• Keethana Samala
• Negar Shakiba
• Basim Shanyour

Supervised MS theses at the lab